After promoting off its MIPS processor enterprise again in 2017, Imagination Technologies has targeted on what it does finest, particularly graphics processing applied sciences. But CPUs appear to stay on the corporate’s radar as this week the agency introduced its first RISC-V laptop structure course under-graduate educating as a part of its Imagination University Programme (IUP).
This doesn’t essentially carry Imagination again to CPU enterprise proper now because it but has to announce any RISC-V merchandise, however moderately demonstrates the corporate’s pursuits.
The course known as “RVfpga: Understanding Computer Architecture” and it consists of theoretical and sensible supplies to assist college students perceive the fundamentals of processor structure typically in addition to modification or RISC-V cores and microarchitectures. The base core that will probably be used for the course is Western Digital’s SweRV. The course was made in collaboration between Imagination Technologies, Sarah Harris and Daniel Chaver, two associate professors from RIOS Laboratory.
Architecture to watch
RISC-V is an open-source architecture that can be used by anyone to build actual processor cores and SoCs without paying any royalties to the developer of architectures. Meanwhile, nothing prevents IP companies to build commercial versions of RISC-V cores for their projects.
While traditionally Imagination has focused on graphics processing for mobile SoCs, in the recent years the company began to offer IP for AI and computer vision applications, including those for automotive markets. Building complete platforms for automotive, industrial, and other emerging verticals might require Imagination to offer its own CPU IP too (or at least use CPU cores designed by someone else) and RISC-V is an architecture to watch these days.
Officially, Imagination yet has to engage back into CPU cores business and it is unclear whether the company actually has such plans. But the RISC-V course as part of its IUP program showcases the direction where Imagination is looking at.
“RISC-V is real and will pervade every computing level in the next five years,” said Robert Owen, Director Worldwide University Programme, Imagination.
“Its openness has enabled designers at all levels to get involved with processors without having to worry about licensing at the early stages of design. This is empowering a new generation to experiment! Up to now, academic activity has been focused on SoC design. This course is the first to provide the all-important foundation of understanding of the components of the RISC-V “engine” and how they come together. I am delighted that the Imagination University Programme has led the creation of these materials.”